Logic Lab
Binary Systems v2.8
AND
OR
NOT
XOR
Truth Analysis
Node ID
Type
Output
g1
AND
LOW
g2
NOT
HIGH
Signal Timing
Clocking: Continuous
Click inputs on gates to toggle signal state.
g1
AND
1
0
g2
NOT
1
Real-Time Logic Propagation Plane
v5.0.0 — BUILD 2026-04-26